It is desirable to form medium to low precision quartz resonator controlled oscillators using CMOS circuitry, especially when such oscillators are to be used as clocks for microprocessors. Such CMOS oscillators generally utilize a single inverter stage (i.e. a single CMOS inverter) for the oscillator, and another inverter stage as an isolation buffer and gain amplifier. A Pierce oscillator circuit formed in CMOS using a single inverter stage is shown in FIG. 1.
At frequencies in the tens of megaHertz (MHz), the Pierce oscillator circuit of FIG. 1 has a relatively low circuit impedance thereby requiring a correspondingly high transconductance for the single inverter for reliable operation. Typically 10 deciBells (dB) of excess gain is desirable. However, a single CMOS inverter stage cannot provide enough transconductance to achieve this level of excess gain which is needed for reliable operation.
Typically to overcome this gain limitation, a triple inverter chain is used as the sustaining amplifier. However, such a triple inverter chain, when used in a Pierce oscillator configuration, allows a parasitic oscillation and provides a low operating Q for the desired quartz resonator controlled mode. The parasitic oscillation, which occurs at frequencies other than that of the quartz resonator, arises from the increased gain and additional poles supplied by the multiple inverter stages. This parasitic oscillation can severely degrade the reliability of the oscillator, and produces an erratic start-up behavior.
The present invention represents an advance in the art by eliminating the parasitic oscillation problems which have heretofore prevented the use of three inverter stages in a CMOS or FET Pierce oscillator circuit. This allows the fabrication of triple-inverter Pierce oscillator circuits which can operate at frequencies that are generally in the range of 10–50 MHz or more. The present invention is applicable to fabrication of a triple-inverter Pierce oscillator circuit as a low-voltage CMOS integrated circuit.
The triple-inverter Pierce oscillator circuit of the present invention can be formed using discrete components, or as a CMOS integrated circuit which includes all circuit components except for the resonator.
The triple-inverter Pierce oscillator circuit of the present invention has applications for use in forming a clock for a microprocessor or other integrated circuitry, or can be used in resonator sensing applications wherein a resonator loading changes over time due to a sensed chemical species which contacts a surface of the resonator, or which produces a mass accumulation thereon.
These and other advantages of the present invention will become evident to those skilled in the art.